This invention relates to the field of data processing systems. More particularly, this invention relates to the field of interconnect circuitry for providing communication between a selected one of a plurality of signal inputs and a signal output by applying an arbitration policy.
It is known to provide interconnect circuitry for providing a communication path for data between a selected one of a plurality of signal inputs and a single output. Such multiplexing circuitry may apply an arbitration policy so that certain signal inputs are given priority in securing access to the signal output. A challenge within such interconnect circuitry is to reduce the time taken for the arbitration (thereby reducing the number of cycles taken for arbitration or permitting use of a higher clock frequency) while ensuring fairness between the signal inputs, e.g. where more than one parameter controls arbitration.